while SS is down and the words are transferred, delay for at least ??? XTAL:
	- after SS went down: wait 4 XTAL before sending address
	- after sending address: wait 8 XTAL before sending control
	- after sending control: wait 15 XTAL before sending data
	- after sending data: wait 12 XTAL before sending ???
	XTAL = μs for an 1 MHz oscillator (for 62.5 kTS/s on the VAN bus)
after Byte, wait SPI 8 Pulses (for init) inter-word (don't re-up in-between)
pull-up INT
Strategy
	first make a user-space driver when a Linux module for the clock
	then make everything work
	then make a SocketCAN driver
		see drivers/net/can
		two kinds of sockets are there
		Register it as a SPI device as well as a SocketCAN device
	Find out how to probe it
	Provide RESET on GPIO instead of grounding it!
	Provide Interrupt on GPIO EINT
	then make it use Linux-internal helpers instead of my own
For multi-file Makefile do:
	obj-m += tss463aa.o
	tss463aa-objs := a.o b.o
Clock output pin:
	http://lists.infradead.org/pipermail/linux-arm-kernel/2013-December/222453.html
clk_out_a:
	PI12, GPIO-2 pin 33 of 40
clk_out_b:
	PI13, GPIO-2 pin 35 of 40
"allwinner,sun7i-a20-out-clk" clock
see sun7i_a20_get_out_factors
t_OP bei C_load = 200 pF on SPI/SCI lines:
	Operating Frequency SPI
		4 MHz to 128 kHz
XTAL1 characteristics:
	t_CHCH min 120 ns
		f max = 8333333 Hz (8 MHz)
	t_chcx high time min 20 ns ("50 MHz")
	t_clcx low time min 20 ns
	t_clch rise time max 20 ns
	t_chcl fall time max 20 ns
interrupt handling:
	return IRQ_HANDLED if it was actually yours, IRQ_NONE if not.