1. set up registers (including flags). flags: set overflow (make sure nobody clears it). InterruptDisabled is set by the CPU, make sure it is that way. Decimal is unset by the CPU, make sure it is that way. TODO: what is the initial value of the registers? Set flags accordingly? 2. execute a bunch of instructions, each BRK test expected state (including PC for stopping to test). Do NOT test every instruction for each addressing mode (waste of effort). Note that there are instructions which DON'T WORK with immediate addressing mode, namely: (20) BPL {'r': 16} BCC {'r': 144} BEQ {'r': 240} BMI {'r': 48} BVS {'r': 112} BCS {'r': 176} BNE {'r': 208} BVC {'r': 80} DEC {'a': 206, 'aX': 222, 'Z': 198, 'ZX': 214} STA {'a': 141, 'IX': 129, 'IY': 145, 'aX': 157, 'aY': 153, 'ZX': 149, 'Z': 133} ROL {'a': 46, 'aX': 62, None: 42, 'Z': 38, 'ZX': 54} STY {'a': 140, 'Z': 132, 'ZX': 148} JMP {'a': 108, 'V': 76} LSR {'a': 78, 'aX': 94, None: 74, 'Z': 70, 'ZX': 86} JSR {'V': 32} BIT {'a': 44, 'Z': 36} ASL {'a': 14, 'aX': 30, None: 10, 'Z': 6, 'ZX': 22} STX {'a': 142, 'Z': 134, 'ZY': 150} ROR {'a': 110, 'aX': 126, None: 106, 'Z': 102, 'ZX': 118} INC {'a': 238, 'aX': 254, 'Z': 230, 'ZX': 246} Instructions which DO work with immediate addressing mode (or have no operand): (12) CPX {'a': 236, 'Z': 228, 'v': 224} EOR {'a': 77, 'IX': 65, 'aX': 93, 'IY': 81, 'v': 73, 'aY': 89, 'ZX': 85, 'Z': 69} LDA {'a': 173, 'IX': 161, 'aX': 189, 'IY': 177, 'v': 169, 'aY': 185, 'ZX': 181, 'Z': 165} LDY {'a': 172, 'aX': 188, 'Z': 164, 'ZX': 180, 'v': 160} LDX {'a': 174, 'aY': 190, 'Z': 166, 'ZY': 182, 'v': 162} CPY {'a': 204, 'Z': 196, 'v': 192} ADC {'a': 109, 'IX': 97, 'aX': 125, 'IY': 113, 'v': 105, 'aY': 121, 'ZX': 117, 'Z': 101} AND {'a': 45, 'IX': 33, 'aX': 61, 'IY': 49, 'v': 41, 'aY': 57, 'ZX': 53, 'Z': 37} CMP {'a': 205, 'IX': 193, 'aX': 221, 'IY': 209, 'v': 201, 'aY': 217, 'ZX': 213, 'Z': 197} SBC {'a': 237, 'IX': 225, 'aX': 253, 'IY': 241, 'v': 235, 'aY': 249, 'ZX': 245, 'Z': 229} NOP {'a': 12, None: 250, 'ZX': 244, 'v': 226, 'aX': 252, 'Z': 100} ORA {'a': 13, 'IX': 1, 'aX': 29, 'IY': 17, 'v': 9, 'aY': 25, 'ZX': 21, 'Z': 5} Instructions which have no operand: (24) DEX {None: 202} DEY {None: 136} TAX {None: 170} TSX {None: 186} RTI {None: 64} TAY {None: 168} TXA {None: 138} RTS {None: 96} SED {None: 248} SEC {None: 56} TXS {None: 154} SEI {None: 120} CLI {None: 88} CLD {None: 216} CLC {None: 24} CLV {None: 184} INX {None: 232} INY {None: 200} PLP {None: 40} PHA {None: 72} TYA {None: 152} BRK {None: 0} PLA {None: 104} PHP {None: 8} Missing instructions: invalid instructions.